Gallium nitride (GaN) based transistors include GaN/AlGaN HEMT (high electron mobility transistor) or HFET (heterojunction field effect transistor) structures, comprising 2DEG (two dimensional electron gas). Theoretically GaN material brings superior properties to the table, with better electron mobility (speed, efficiency) and better high voltage ability than both Si and SiC. GaN power and RF technology includes AlGaN/GaN HEMTs and schottky diodes. However, GaN technology of today is generally higher in cost than Si technology and generally inferior in material quality and high voltage reliability than SiC technology. This due to the use of foreign substrates necessitated by inability to fabricate sufficient production levels of GaN native substrates at commercially viable cost levels. Thus, the major limits of GaN electronics technology boils down to material crystal dislocations and wafer production costs related to minimization of dislocations originating from growth on foreign substrates.
Misfit dislocations, in form of threading dislocations, formed in nitride layers produced by conventional methods (heteroepitaxial growth) lower the operating voltage ability of power electronic devices and decrease the reliability of the devices. The addition of a buffer layer between the substrate and the nitride (device) layer reduces the number of defects. Typically this gives defect densities of 10−8-10−9 cm−2 for GaN growth on SiC, slightly higher for GaN growth on sapphire substrates and 10−9-10−10 cm−2 for GaN on Si. However, deposition of the buffer layer increases the cost of the devices. A thicker buffer layer provides higher device quality than a thinner buffer layer. This can be achieved by longer growth times, but longer growth times increase the cost of the device. Further, the addition of a thick buffer layer may induce wafer bow due to lattice mismatch between the substrate and the buffer layer.
GaN films are typically grown by industrial scale MOCVD techniques. To achieve acceptable quality of the films the growth is performed with high precursor flow such as NH3 and TMG (trimethylgallium), and hence high partial pressures. A commonly used measure is the so called “V/III-ratio” which relates the molar flow of the precursor elements, for example the molar ratio between the NH3 and TMG. The V/III-ratio used for GaN film growth is in the range of 1000-10000.
Top standard GaN films of today do still have very high densities of defects. Under such background, 1-dimensional structures, that is nanowires based on nitrides have attracted plenty of attentions from researchers. Several methods such as VLS, template-confinement growth, and oxide-assisted growth have been reported for GaN nanowires growth.
Additionally, an insulating/non-conducting buffer layer could be used to prevent individual nanodevices from short circuiting with their neighbors. Shorts between individual devices rule out on-chip multiple device circuitries. Non conducting or semi insulating substrates are advantageous for RF applications. Threading dislocations, generally enhancing n-type properties in GaN, limits the possibility to make semi insulating buffer material.
Selective area growth of GaN has also been studied extensively from 1990's to reduce the dislocations density in GaN films. From dot-patterned GaN openings, Akasaka et al. showed GaN columns growth with the diameter of 5 μm. Recently, Hersee et al. reported array fabrication of GaN wires using selective area growth. It is described that pulsed growth had to be used for growing GaN nanowires to confine the lateral growth. Pulsed growth is also referred to as migration enhanced growth. The method may be described as a two step method comprising an initial nanowire growth step referred to as a selective growth step wherein both precursor gases are provided. The initial growth step is followed by a secondary step of pulsed growth, wherein precursor gases are provided one at the time.